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		No cover image available Traps and trap generation in ultrathin jet vapor deposited, JVD, silicon nitride gate dielectrics (R) by ManjulaRani, K.N [Author] \| Vasi, J.M [Supervisor] \| Ramgopal Rao, V [Supervisor] \| Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2004Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2004 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3:621.315.61 Man. Add to cart (remove)
		No cover image available Negative bias temperature instability for SiON p-MOSFETs (R) by Maheta, Vrajesh D [Author] \| Mahapatra, S [Supervisor] \| Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay ; IIT ; 2008Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2008 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382 Mah. Add to cart (remove)
		No cover image available Characterization and modelling of NBTI in silicon oxynitride (SiON) and high-k metal gate p-MOSFETs with impact on circuit performance (R) by Goel, Nilesh [Author] \| Mahapatra, Souvik [Supervisor] \| Indian Institute of Technology Bombay. Department of Electrical Engineering. Language: English Publication details: Mumbai IIT 2015Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2015 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382 Goe. Add to cart (remove)

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