Results
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Traps and trap generation in ultrathin jet vapor deposited, JVD, silicon nitride gate dielectrics (R) by ManjulaRani, K.N [Author] | Vasi, J.M [Supervisor] | Ramgopal Rao, V [Supervisor] | Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2004Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2004 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3:621.315.61 Man.
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Optimization of deep sub-micron CMOS technologies for mixed signal circuits (R) by Narasimhulu, K [Author] | Rao Ramgopal, V [Supervisor] | Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2006Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2006 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3 Nar.
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Negative bias temperature instability for SiON p-MOSFETs (R) by Maheta, Vrajesh D [Author] | Mahapatra, S [Supervisor] | Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay ; IIT ; 2008Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2008 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382 Mah.
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CMOS reliability in advanced technology nodes : device to circuit interaction (R) by Mishra, Subrat [Author] | Mahapatra, Souvik [Supervisor] | Indian Institute of Technology Bombay. Department of Electrical Engineering. Material type: Text; Format:
print
; Literary form:
Not fiction
Language: English Publication details: Mumbai IIT 2018Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2018 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382 Mis.
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Transition metal dichalcogenides for logic and memory applications (R) by Kaushik, Naveen [Author] | Lodha, Saurabh [Supervisor] | Indian Institute of Technology Bombay. Department of Electrical Engineering. Material type: Text; Format:
print
; Literary form:
Not fiction
Language: English Publication details: Mumbai IIT 2018Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2018 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3 Kau.
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