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Scaling and optimization of CMOS technologies for logic and non-volatile memory applications (R) by Mohapatra, Nihar Ranjan [Author] | Ramgopal Rao, V [Supervisor] | Desai, Madhav P [Supervisor] | Indian Institute of Technology Bombay. Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2003Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003 Availability: Items available for reference: Not for loan (1) Call number: 043:621.372:621.382 Moh.
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Optimization of deep sub-micron CMOS technologies for mixed signal circuits (R) by Narasimhulu, K [Author] | Rao Ramgopal, V [Supervisor] | Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2006Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2006 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3 Nar.
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I/O and ESD device optimization for nanometer node CMOS technologies (R) by Shrivastava, Mayank [Author] | Rao, Ramgopal V [Supervisor] | Baghini, M.S [Supervisor]. Language: English Publication details: Mumbai IIT 2010Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2010 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382:621.372 Shr.
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Design and analysis of energy-efficient signaling schemes for long on-chip wires (R) by Dave, Marshnil [Author] | Sharma, Dinesh K [Supervisor] | Baghini, Maryam Shojaei [Supervisor] | Indian Institute of Technology Bombay. Department of Electrical Engineering. Language: English Publication details: Mumbai IIT 2013Dissertation note: Thesis
Ph.D.
Indian Institute of Technology Bombay. Department of Electrical Engineering 2013 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382:621.391.8 Dav.
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