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			Scaling and optimization of CMOS technologies for logic and non-volatile memory applications (R) by Mohapatra, Nihar Ranjan [Author] Ramgopal Rao, V [Supervisor] Desai, Madhav P [Supervisor] Indian Institute of Technology Bombay. Department of Electrical Engineering Language: English Publication details: Bombay IIT 2003 Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003 Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.372:621.382 Moh. Save to lists Add to cart (remove)
			Optimization of deep sub-micron CMOS technologies for mixed signal circuits (R) by Narasimhulu, K [Author] Rao Ramgopal, V [Supervisor] Indian Institute of Technology Bombay Department of Electrical Engineering Language: English Publication details: Bombay IIT 2006 Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2006 Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.382.3 Nar. Save to lists Add to cart (remove)
			Evaluation of DTMOS as a solution to the voltage scaling problem : a circuit performance perspective (R) by Bulusu, Anand [Author] Desai, Madhav P [Supervisor] Indian Institute of Technology Bombay Department of Electrical Engineering Language: English Publication details: Bombay IIT 2006 Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2006 Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.382 Bul. Save to lists Add to cart (remove)
			I/O and ESD device optimization for nanometer node CMOS technologies (R) by Shrivastava, Mayank [Author] Rao, Ramgopal V [Supervisor] Baghini, M.S [Supervisor] Language: English Publication details: Mumbai IIT 2010 Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2010 Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.382:621.372 Shr. Save to lists Add to cart (remove)
			Design and analysis of energy-efficient signaling schemes for long on-chip wires (R) by Dave, Marshnil [Author] Sharma, Dinesh K [Supervisor] Baghini, Maryam Shojaei [Supervisor] Indian Institute of Technology Bombay. Department of Electrical Engineering Language: English Publication details: Mumbai IIT 2013 Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2013 Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.382:621.391.8 Dav. Save to lists Add to cart (remove)
			CMOS device design and circuit performance of silicon gate all around nanowire MOSFETs in scaled technologies (R) by Nayak, Kaushik [Author] Rao, V. Ramgopal [Supervisor] Iwai, Hiroshi [ Supervisor] Indian Institute of Technology Bombay. Department of Electrical Engineering Language: English Publication details: Mumbai 2014 IIT Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2014 Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.382.3 Nay. Save to lists Add to cart (remove)
			Testability issues in nanometer technologies : a new test methodology and worst-case -path delay estimation technique (R) by Srivastava, Ankush [Author] Singh, Virendra [Supervisor] Indian Institute of Technology Bombay. Department of Electrical Engineering Material type: Text; Format: print ; Literary form: Not fiction Language: English Publication details: Mumbai IIT 2018 Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2018 Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.382:621.372 Sri. Lists: Display List 07/01/2019-13/01/2019. Save to lists Add to cart (remove)