Scaling and optimization of CMOS technologies for logic and non-volatile memory applications (R)
Language: English Publication details: Bombay 2003 IITDescription: xii,110 p; 30 cmSubject(s): Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003Item type | Current library | Call number | Status | Notes | Barcode | |
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Central Library, IITB Pamphlet Section (Theses, Standards, Reports) | 043:621.372:621.382 Moh | Not for loan | D08A26 | 201473 |
Total holds: 0
Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003
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