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Scaling and optimization of CMOS technologies for logic and non-volatile memory applications (R) by Mohapatra, Nihar Ranjan [Author] | Ramgopal Rao, V [Supervisor] | Desai, Madhav P [Supervisor] | Indian Institute of Technology Bombay. Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2003Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003 Availability: Items available for reference: Not for loan (1) Call number: 043:621.372:621.382 Moh.
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Traps and trap generation in ultrathin jet vapor deposited, JVD, silicon nitride gate dielectrics (R) by ManjulaRani, K.N [Author] | Vasi, J.M [Supervisor] | Ramgopal Rao, V [Supervisor] | Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2004Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2004 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3:621.315.61 Man.
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Device design and optimization of nanoscale FinFETs for logic applications (R) by Manoj, C.R [Author] | Ramgopal Rao, V [Supervisor] | Patil, Mahesh B [Supervisor] | Indian Institute of Technology Bombay Department of Electrical Engineering. Language: English Publication details: Bombay ; IIT ; 2008Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2008 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3 Man.
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