Device design and optimization of nanoscale FinFETs for logic applications (R)
Language: English Publication details: Bombay ; IIT ; 2008Description: xiv,125 p; 30 cmSubject(s): Ramgopal Rao, V. and Patil, Mahesh B | Theses and Dissertations | Electronic circuits | Metal oxide simiconductors | ComplementaryDissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2008Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
---|---|---|---|---|---|---|---|
Theses and Dissertations | Central Library, IITB Pamphlet Section (Theses, Standards, Reports) | 043:621.382.3 Man | Not for loan | D08A27 | 220215 |
Total holds: 0
Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2008
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