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Scaling and optimization of CMOS technologies for logic and non-volatile memory applications (R) by
Language: English
Publication details: Bombay IIT 2003
Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003
Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.372:621.382 Moh.

Effect of device dimensions, layout and technological parameters on the performance and reliability of Nano-scale HKMG transistors (R) by
Language: English
Publication details: Mumbai IIT 2017
Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2017
Availability: Items available for reference: Central Library, IITB: Not for loan (1)Call number: 043:621.382.3:620.168.3 Duh.