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		No cover image available Scaling and optimization of CMOS technologies for logic and non-volatile memory applications (R) by Mohapatra, Nihar Ranjan [Author] \| Ramgopal Rao, V [Supervisor] \| Desai, Madhav P [Supervisor] \| Indian Institute of Technology Bombay. Department of Electrical Engineering. Language: English Publication details: Bombay IIT 2003Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003 Availability: Items available for reference: Not for loan (1) Call number: 043:621.372:621.382 Moh. Add to cart (remove)
		No cover image available Effect of device dimensions, layout and technological parameters on the performance and reliability of Nano-scale HKMG transistors (R) by Duhan, Pardeep [Author] \| Rao, V. Ramgopal [Supervisor] \| Mohapatra, Nihar Ranjan [Supervisor] \| Baghini, Maryam Shojaei [Supervisor] \| Indian Institute of Technology Bombay. Department of Electrical Engineering. Language: English Publication details: Mumbai IIT 2017Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2017 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3:620.168.3 Duh. Add to cart (remove)

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