Effect of device dimensions, layout and technological parameters on the performance and reliability of Nano-scale HKMG transistors (R)

By: Duhan, Pardeep [Author]Contributor(s): Rao, V. Ramgopal [Supervisor] | Mohapatra, Nihar Ranjan [Supervisor] | Baghini, Maryam Shojaei [Supervisor] | Indian Institute of Technology Bombay. Department of Electrical EngineeringLanguage: English Publication details: Mumbai IIT 2017Description: xviii,107 p. 30 cmSubject(s): Theses and Dissertations | Metal oxide semiconductor field-effect transistors | Nanotechnology | Gate array circuits -- Materials | Nanostructure materialsDissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2017
Star ratings
    Average rating: 0.0 (0 votes)
Holdings
Item type Current library Call number Status Notes Date due Barcode Item holds
Theses and Dissertations Theses and Dissertations Central Library, IITB
Pamphlet Section (Theses, Standards, Reports) 		043:621.382.3:620.168.3 Duh Not for loan D08A19 241553
Total holds: 0

Thesis
Ph.D.
Indian Institute of Technology Bombay. Department of Electrical Engineering 2017

There are no comments on this title.

to post a comment.
Share

Powered by Koha