Implementation of parallel algorithms for boolean logic minimization (R)
Language: English Series: Publication details: Mumbai ; IIT ; 2013Edition: Description: iii,34 p; 30 cmISBN: Subject(s): Vijayakumaran, Saravanan | Theses and Dissertations | Switching circuitsItem type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
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Central Library, IITB | 043:621.374.32:681.3Sap | Not for loan | D04A08 | 234505 |
Total holds: 0
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