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Implementation of parallel algorithms for boolean logic minimization (R)

Sapre, Prajakta

Implementation of parallel algorithms for boolean logic minimization (R) - - Mumbai IIT 2013 - iii,34 p. 30 cm - .

ISBN:

Subjects--Topical Terms:
Vijayakumaran, Saravanan
Theses and Dissertations
Switching circuits

Universal Decimal Class. No.: 043:621.374.32:681.3Sap

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