Compiler based analysis of verilog HDL based digital design and its application to VLSI CAD (R)
Language: English Series: Publication details: Mumbai ; IIT ; 2011Edition: Description: v,53 p; 30 cmISBN: Subject(s): Patkar, Sachin | Theses and Dissertations | Compute-aided design , Integrated circuits-Very large scale integration , Verilog(Computer hardware description language)| Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
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Theses and Dissertations
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Central Library, IITB | 043:621.374.32:681.3Rat | Not for loan | D04A02 | 230063 |
Total holds: 0
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