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		No cover image available Concentration profiled planar p-n junction for high breakdown voltage (R) by Jog, Sujata [Author] \| Sundarsingh, V.P. Language: English Publication details: Bombay IIT 1991Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 1991 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.2 Jog. Add to cart (remove)
		No cover image available Investigation of junction-less transistor (JLT) for CMOS scaling (R) by Gundapaneni, Suresh [Author] \| Kottantharayil, Anil [Supervisor] \| Ganguly, Swaroop [Supervisor]. Language: English Publication details: Mumbai IIT 2012Dissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Electrical Engineering 2012 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382.3 Gun. Add to cart (remove)

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