Modeling accelerated logic simulation on networks-on-chip using systemC (R)
Language: English Series: Publication details: Mumbai ; IIT ; 2013Edition: Description: ix,89 p; 30 cmISBN: Subject(s): Patkar, Sachin B | Theses and Dissertations | Networks on a chip , Systems on a chip , C++(Computer program language)| Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
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Theses and Dissertations
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Central Library, IITB | 043:621.372:621.382Jar | Not for loan | D04A07 | 234672 |
Total holds: 0
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