Simulation of latch-up in CMOS technology (R)

By: Mehrotra, Samit SContributor(s): Vasi, Juzer M. and Patil, Mahesh BLanguage: English Series: Publication details: Mumbai ; IIT ; 2002Edition: Description: xiii,91 p; 30 cmISBN: Subject(s): Vasi, Juzer M. and Patil, Mahesh B | Theses and Dissertations | Metal oxide semiconductors , Complementary-Simulation methods
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Holdings
Item type Current library Call number Status Notes Date due Barcode Item holds
Theses and Dissertations Theses and Dissertations Central Library, IITB
043:621.382:681.3Meh Not for loan D03B14 197819
Total holds: 0

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