Device design and optimization of nanoscale FinFETs for logic applications (R)
Manoj, C.R.
Device design and optimization of nanoscale FinFETs for logic applications (R) - Bombay IIT 2008 - xiv,125 p. 30 cm
Thesis
Ramgopal Rao, V. and Patil, Mahesh B.
Theses and Dissertations
Electronic circuits
Metal oxide simiconductors
Complementary
043:621.382.3 / Man
Device design and optimization of nanoscale FinFETs for logic applications (R) - Bombay IIT 2008 - xiv,125 p. 30 cm
Thesis
Ramgopal Rao, V. and Patil, Mahesh B.
Theses and Dissertations
Electronic circuits
Metal oxide simiconductors
Complementary
043:621.382.3 / Man