Security and testability issues in modern VLSI chips (R)
Ahlawat, Satyadev
Security and testability issues in modern VLSI chips (R) - Mumbai IIT 2018 - xvi,226 p. 30 cm
Thesis
Theses and Dissertations
Digital integrated circuits--Design and construction--Data processing
Integrated circuits--Very largescale integration--Testing
Integrated circuits--Very largescale integration--Security measures
043:621.372:621.382 / Ahl
Security and testability issues in modern VLSI chips (R) - Mumbai IIT 2018 - xvi,226 p. 30 cm
Thesis
Theses and Dissertations
Digital integrated circuits--Design and construction--Data processing
Integrated circuits--Very largescale integration--Testing
Integrated circuits--Very largescale integration--Security measures
043:621.372:621.382 / Ahl