000 | 00918nam a2200253Ia 4500 | ||
---|---|---|---|
003 | OSt | ||
005 | 20221213122040.0 | ||
008 | 211118s9999 xx 000 0 und d | ||
020 | _a978-1-60845-638-3 | ||
040 | _cIITB | ||
041 | _aeng | ||
100 |
_aReddi, Vijay Janapa _922254 _eAuthor |
||
245 | 0 | _aResilient architecture design for voltage variation (e-book) | |
260 |
_aSan Rafael _bMorgan and Claypool / _bIEEE Press / _bSpringer _c2013 |
||
440 |
_aSynthesis lectures on computer architecture _921153 |
||
500 | _aIEEE Morgan and Claypool Computer and Information Science (CIS) collection | ||
650 |
_aMicroprocessors _xPower supply _925099 |
||
650 | 0 |
_914185 _aElectric power system stability |
|
650 |
_aVoltage noise _925100 |
||
650 |
_aInductive noise _925101 |
||
700 |
_aSharma Gupta, Meeta _eAuthor _922255 |
||
856 | _uhttps://ieeexplore.ieee.org/document/6813495 | ||
942 |
_cEB _2udc |
||
999 |
_c278484 _d278484 |