| 000 | 00660 a2200265 4500 | ||
|---|---|---|---|
| 001 | 347755 | ||
| 020 | _a | ||
| 041 | _aeng | ||
| 080 | _a043:621.372:621.382God | ||
| 245 | _aDesign of a fast 32 bit floating point multiply-accumulate circuit using asynchronous pipelining (R) | ||
| 250 | _a | ||
| 260 | _aMumbai | ||
| 260 | _bIIT | ||
| 260 | _c2001 | ||
| 300 | _av,43 p. | ||
| 300 | _c29.5 cm | ||
| 490 | _a | ||
| 100 | _aGodbole, Sachin | ||
| 700 | _aSharma, D. K. | ||
| 650 | _aSharma, D. K. | ||
| 650 | _aTheses and Dissertations | ||
| 650 | _aIntegrated circuits-Very large scale integration-Designata processing | ||
| 942 | _cTD | ||
| 942 | _2UDC | ||
| 999 |
_c232563 _d232563 |
||