| 000 | 00643 a2200265 4500 | ||
|---|---|---|---|
| 001 | 346791 | ||
| 020 | _a | ||
| 041 | _aeng | ||
| 080 | _a043:621.372:621.382Jar | ||
| 245 | _aModeling accelerated logic simulation on networks-on-chip using systemC (R) | ||
| 250 | _a | ||
| 260 | _aMumbai | ||
| 260 | _bIIT | ||
| 260 | _c2013 | ||
| 300 | _aix,89 p. | ||
| 300 | _c30 cm | ||
| 490 | _a | ||
| 100 | _aJaroli, Samyak | ||
| 700 | _aPatkar, Sachin B. | ||
| 650 | _aPatkar, Sachin B. | ||
| 650 | _aTheses and Dissertations | ||
| 650 | _aNetworks on a chip , Systems on a chip , C++(Computer program language) | ||
| 942 | _cTD | ||
| 942 | _2UDC | ||
| 999 |
_c230958 _d230958 |
||