000 00926 a2200265 4500
001 345396
003 OSt
005 20230415115304.0
008 230415b |||||||| |||| 00| 0 eng d
040 _cIITB
041 _aeng
080 _a043:621.385.832:681.3
_bMeh
100 _aMehendale, Mahesh M.
_eAuthor
_946683
245 _aHigh level synthesis of DSP algorithms (R)
260 _aMumbai
_bIIT
_c1999
300 _axiv,228 p.
_c30 cm
502 _aThesis
_bPh.D.
_cIndian Institute of Technology Bombay. Department of Computer Science and Engineering
_d1999
650 0 _aTheses and Dissertations
_921
650 0 _aDigital signal processing
_920261
650 _aAlgorithms
_92480
700 _aSohoni, Milind
_919834
_eSupervisor
700 _a Sherlekar, S.D.
_eSupervisor
_946421
710 _9140
_aIndian Institute of Technology Bombay.
_bDepartment of Computer Science and Engineering
942 _cTD
_2udc
999 _c229471
_d229471