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040 _cIITB
041 _aeng
080 _a043:621.382.3
_bMan
100 _aManoj, C.R.
_eAuthor
_947297
245 _aDevice design and optimization of nanoscale FinFETs for logic applications (R)
260 _aBombay
260 _bIIT
260 _c2008
300 _axiv,125 p.
300 _c30 cm
502 _aThesis
_bPh.D
_cIndian Institute of Technology Bombay. Department of Electrical Engineering
_d2008
650 _aRamgopal Rao, V. and Patil, Mahesh B.
_947298
650 _aTheses and Dissertations
_921
650 _aElectronic circuits
_92333
650 _a Metal oxide simiconductors
_947299
650 _aComplementary
_9394
700 _aRamgopal Rao, V.
_eSupervisor
_947300
700 _aPatil, Mahesh B.
_eSupervisor
_947301
710 _aIndian Institute of Technology Bombay
_bDepartment of Electrical Engineering
_964
942 _cTD
_2udc
999 _c203437
_d203437