| 000 | 00574 a2200265 4500 | ||
|---|---|---|---|
| 001 | 237974 | ||
| 020 | _a | ||
| 041 | _aeng | ||
| 080 | _a043:621.374.32:681.3Bav | ||
| 245 | _aPipelined simulation approach for logic emulation (R) | ||
| 250 | _a | ||
| 260 | _aMumbai | ||
| 260 | _bIIT | ||
| 260 | _c2007 | ||
| 300 | _avi,54 p. | ||
| 300 | _c30 cm | ||
| 490 | _a | ||
| 100 | _aBaviskar, Dinesh | ||
| 700 | _aPatkar, Sachin B. | ||
| 650 | _aPatkar, Sachin B. | ||
| 650 | _aTheses and Dissertations | ||
| 650 | _aComputer architecture | ||
| 942 | _cTD | ||
| 942 | _2UDC | ||
| 999 |
_c198676 _d198676 |
||