| 000 | 00679 a2200265 4500 | ||
|---|---|---|---|
| 001 | 231483 | ||
| 020 | _a | ||
| 041 | _aeng | ||
| 080 | _a043:621.372:621.382Kar | ||
| 245 | _aPartitioning for fault simulation acceleration on an FPGA based hardware emulator (R) | ||
| 250 | _a | ||
| 260 | _aMumbai | ||
| 260 | _bIIT | ||
| 260 | _c2006 | ||
| 300 | _aiv,30 p. | ||
| 300 | _c29 cm | ||
| 490 | _a | ||
| 100 | _aKarthik, N. | ||
| 700 | _aDesai, Madhav P. | ||
| 650 | _aDesai, Madhav P. | ||
| 650 | _aTheses and Dissertations | ||
| 650 | _aField programmable gate arrays , Integrated circuits-Computer simulation , Fault location(Engineering) | ||
| 942 | _cTD | ||
| 942 | _2UDC | ||
| 999 |
_c196745 _d196745 |
||