| 000 | 00725 a2200265 4500 | ||
|---|---|---|---|
| 001 | 219993 | ||
| 020 | _a | ||
| 041 | _aeng | ||
| 080 | _a043:621.374.32:681.3Jos | ||
| 245 | _aSymbolic model checking of large sequential circuits (R) | ||
| 250 | _a | ||
| 260 | _aMumbai | ||
| 260 | _bIIT | ||
| 260 | _c2006 | ||
| 300 | _a39 p. | ||
| 300 | _c29 cm | ||
| 490 | _a | ||
| 100 | _aJoshi, Saurabh | ||
| 700 | _aChakraborty, Supratik | ||
| 650 | _aChakraborty, Supratik | ||
| 650 | _aTheses and Dissertations | ||
| 650 | _aSymbolic circuit analysis-Data processing , Logic design-Data processing , Sequential processing (Computer science) , Integrated circuits-Very large scale integration | ||
| 942 | _cTD | ||
| 942 | _2UDC | ||
| 999 |
_c194262 _d194262 |
||