000 | 01075 a2200301 4500 | ||
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001 | 91767 | ||
003 | OSt | ||
005 | 20230506125823.0 | ||
008 | 230506b |||||||| |||| 00| 0 eng d | ||
040 | _cIITB | ||
041 | _aeng | ||
080 |
_a043:621.372:621.382 _bMoh |
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100 |
_aMohapatra, Nihar Ranjan _eAuthor _947870 |
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245 | _aScaling and optimization of CMOS technologies for logic and non-volatile memory applications (R) | ||
260 |
_aBombay _c2003 _bIIT |
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300 | _axii,110 p. | ||
300 | _c30 cm | ||
502 |
_aThesis _bPh.D _cIndian Institute of Technology Bombay. Department of Electrical Engineering _d2003 |
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650 |
_aRamgopal Rao, V. and Desai, Madhav P. _947871 |
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650 |
_aTheses and Dissertations _921 |
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650 |
_aMetal oxide semiconductors _92430 |
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650 |
_aComplimentary _93322 |
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650 |
_aMemory devices _947872 |
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700 |
_aRamgopal Rao, V. _eSupervisor _947300 |
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700 |
_aDesai, Madhav P. _eSupervisor _947445 |
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710 |
_aIndian Institute of Technology Bombay. _bDepartment of Electrical Engineering _964 |
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942 |
_cTD _2udc |
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999 |
_c181404 _d181404 |