000 00885 a2200265 4500
001 44074
003 OSt
005 20230429133732.0
008 230429b |||||||| |||| 00| 0 eng d
020 _a0
040 _cIITB
041 _aeng
080 _a043:621.372:621.382
_bShe
100 _aSherlekar S.D.
_eAuthor
_946421
245 _aStudies in testing of transistor stuck-open faults in combinational CMOS circuits (R)
260 _aBombay
_bIIT
_c1987
300 _axi, 135 p.
_c27 cm
502 _aThesis
_bPh.D.
_cIndian Institute of Technology Bombay. Department of Electrical Engineering
_d1987
650 0 _aTheses and Dissertations
_921
650 0 _aVLSI circuits
_99748
650 _aTesting
_947343
700 _aVasi, J.
_eSupervisor
_947339
710 _964
_aIndian Institute of Technology Bombay.
_bDepartment of Electrical Engineering
942 _cTD
_2udc
999 _c166670
_d166670