000 | 00711 a2200289 4500 | ||
---|---|---|---|
001 | 79637 | ||
020 | _a0-7923-8321-416 | ||
041 | _aeng | ||
080 | _a621.374.32:681.3 Mah | ||
245 | _aTiming analysis and optimization of sequential circuits | ||
250 | _a | ||
260 | _a | ||
260 | _bBoston : Kluwer Academic Pub., 1999 | ||
260 | _c1999 | ||
300 | _axv,190 p. | ||
300 | _c24 cm | ||
490 | _a | ||
100 | _aMaheshwari, Naresh | ||
700 | _aSapatnekar, Sachin S. | ||
700 | _a | ||
650 | _a | ||
650 | _aSequential processing (Computer science) | ||
650 | _aIntegrated circuits-Verification | ||
650 | _aIntegrated circuits-very largescale integration | ||
942 | _cBK | ||
942 | _2UDC | ||
999 |
_c103873 _d103873 |