Timing verification of VLSI digital design (R)
Language: English Series: Publication details: Mumbai ; IIT ; 1998Edition: Description: v,134 p; 28 cmISBN: Subject(s): Desai, M.P | Theses and Dissertations | Digital electronics , Integrated circuits-very large scale integration , Integrated circuits-Verification| Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|
Theses and Dissertations
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Central Library, IITB | 043:621.374.32:681.3Bha | Not for loan | D03B08 | 183728 |
Total holds: 0
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