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Scaling and optimization of CMOS technologies for logic and non-volatile memory applications (R)

by Mohapatra, Nihar Ranjan [Author] | Ramgopal Rao, V [Supervisor] | Desai, Madhav P [Supervisor] | Indian Institute of Technology Bombay. Department of Electrical Engineering.

Language: English Publication details: Bombay IIT 2003Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2003 Availability: Items available for reference: Not for loan (1) Call number: 043:621.372:621.382 Moh.

Evaluation of DTMOS as a solution to the voltage scaling problem : a circuit performance perspective (R)

by Bulusu, Anand [Author] | Desai, Madhav P [Supervisor] | Indian Institute of Technology Bombay Department of Electrical Engineering.

Language: English Publication details: Bombay IIT 2006Dissertation note: Thesis Ph.D Indian Institute of Technology Bombay. Department of Electrical Engineering 2006 Availability: Items available for reference: Not for loan (1) Call number: 043:621.382 Bul.

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