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Topological optimisation of PLAs using folding (R)

by Kane, S.K | Vasi, J.M. and Sherlekar, S.D.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1985Availability: Items available for reference: Not for loan (1) Call number: 043:621.374.32:681.3Kan.

Design and implementation of modula-2 computer on MC68000 system (R)

by Karmarkar, S.K | Sherlekar, S.D. and Biswas, S.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1986Availability: Items available for reference: Not for loan (1) Call number: 043:681.326.32:681.3.06Kar.

High level synthesis using ideal (R)

by Urdhwareshe, Nachiket | Venkatesh, G. and Sherlekar, S.D.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1991Availability: Items available for reference: Not for loan (1) Call number: 043:681.3.06Urd.

Ideal to VHDL translator (R)

by Anand, K | Sherlekar, S.D. and Verma, A.K.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1991Availability: Items available for reference: Not for loan (1) Call number: 043:681.3.06Ana.

Development of input interface for IDEAL (R)

by Venkateswarlu, M | Sherlekar, S.D. and Verma, A.K.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1992Availability: Items available for reference: Not for loan (1) Call number: 043:681.3.06:658.562Ven.

Formal semantics of broadcasting sequential processes (R)

by Goregaokar, S.R | Sherlekar, S.D.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1985Availability: Items available for reference: Not for loan (1) Call number: 043:681.3.06:621.391Gor.

Improved decision procedures for propositional temporal logic for timing verification of digital systems (R)

by Bapat, S | sherlekar, S.D.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1986Availability: Items available for reference: Not for loan (1) Call number: 043:621.391.8:681.3:16Bap.

Kernel for development and integration of CAD tools (R)

by Anantharaman, K | Biswas, S. and Venkatesh, G. Sherlekar, S.D.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1988Availability: Items available for reference: Not for loan (1) Call number: 043:621.385.832:681.3Ana.

Hierarchical text-cum-graphics system for symbolic VLSI layout design (R)

by Rawat, Vipin | Sherlekar, S.D. and Venkatesh, G.

Series: Edition: Language: English Publication details: Bombay ; IIT ; 1989Availability: Items available for reference: Not for loan (1) Call number: 043:681.3:621.372:621.382Raw.

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