Chip multiprocessor architecture : techniques to improve throughput and latency (e-book)
Material type:
TextLanguage: English Series: Synthesis lectures on computer architecturePublication details: San Rafael Morgan and Claypool / IEEE Press / Springer 2007ISBN: 978-1-59829-123-0Subject(s): Parallel processing (Electronic computers) | Computer architecture | High performance processors | Multi-core microprocessors | Chip Multiprocessors (CMPs) | Thread-Level Speculation (TLS)Online resources: Click here to access online
| Item type | Current library | Call number | URL | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|
E-Books
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Central Library, IITB Online | Link to resource | Online | EBK5970 |
Total holds: 0
IEEE Morgan and Claypool Computer and Information Science (CIS) collection
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