Design of a fast 32 bit floating point multiply-accumulate circuit using asynchronous pipelining (R)
Language: English Series: Publication details: Mumbai ; IIT ; 2001Edition: Description: v,43 p; 29.5 cmISBN: Subject(s): Sharma, D. K | Theses and Dissertations | Integrated circuits-Very large scale integration-Designata processing| Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|
Theses and Dissertations
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Central Library, IITB | 043:621.372:621.382God | Not for loan | D03B12 | 192230 |
Total holds: 0
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