Design of on-chip test circuits for high speed on-chip interconnects (R)
Language: English Series: Publication details: Mumbai ; IIT ; 2013Edition: Description: ix,35 p; 30 cmISBN: Subject(s): Sharma, Dinesh K. and Baghini, Maryam Shojaei | Theses and Dissertations | Interconnects(Integrated circuit technology) , Integrated circuits-Very large scale integration-Design , Systems on a chip-Testing| Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
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Theses and Dissertations
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Central Library, IITB | 043:621.372:621.382Kar | Not for loan | D04A07 | 234596 |
Total holds: 0
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