Design of monitored self-checking sequential circuits (R)

By: Parekhji, Rubin A [Author]Contributor(s): Venkatesh, G [Supervisor] | Sherlekar, S.D [Supervisor] | Indian Institute of Technology Bombay. Department of Computer Science and EngineeringLanguage: English Publication details: Bombay IIT 1994Description: 174 p. 28 cmSubject(s): Theses and Dissertations | Sequential processing (Computer science) | Fault-tolerant computing -- tolerant computing | Self checking circuitsDissertation note: Thesis Ph.D. Indian Institute of Technology Bombay. Department of Computer Science and Engineering 1994
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Holdings
Item type Current library Call number Status Notes Date due Barcode Item holds
Theses and Dissertations Theses and Dissertations Central Library, IITB
Pamphlet Section (Theses, Standards, Reports)
043:681.3:658.562 Par Not for loan D08A11 170817
Total holds: 0

Thesis
Ph.D.
Indian Institute of Technology Bombay. Department of Computer Science and Engineering 1994

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