Hardware synthesis and simulation of polar codes using FPGA (R)
Language: English Series: Publication details: Mumbai ; IIT ; 2011Edition: Description: vii,33 p; 30 cmISBN: Subject(s): Rajbabu V. and Vijayakumaran Saravanan | Theses and Dissertations | Coding theory , Signal processing-Digital techniques , Digital communications| Item type | Current library | Call number | Status | Notes | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|
Theses and Dissertations
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Central Library, IITB | 043:621.391:681.3Nee | Not for loan | D04A02 | 229963 |
Total holds: 0
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