Digital design with an introduction to the verilog HDL (Record no. 296776)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00869nam a22002777a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240618133211.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 230606b |||||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 978-81-317-9474-6 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | IITB |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 080 ## - UNIVERSAL DECIMAL CLASSIFICATION NUMBER | |
| Universal Decimal Classification number | 681.3(VHDL) |
| Item number | Man |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Mano, M. Moris |
| Relator term | Author |
| 9 (RLIN) | 50021 |
| 245 ## - TITLE STATEMENT | |
| Title | Digital design with an introduction to the verilog HDL |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 5th ed |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Chennai |
| Name of publisher, distributor, etc. | Pearson Education |
| Date of publication, distribution, etc. | 2013 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xv,678 p. |
| Dimensions | 24 cm |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| 9 (RLIN) | 7673 |
| Topical term or geographic name entry element | Computer science and engineering |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Electronic digital computers |
| General subdivision | Circuits |
| 9 (RLIN) | 50022 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| 9 (RLIN) | 49801 |
| Topical term or geographic name entry element | Logic circuits |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| 9 (RLIN) | 47131 |
| Topical term or geographic name entry element | Logic design |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| 9 (RLIN) | 3220 |
| Topical term or geographic name entry element | Digital integrated circuits |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | VHDL (Computer hardware description language) |
| 9 (RLIN) | 50023 |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Ciletti, Michael D |
| Relator term | Author |
| 9 (RLIN) | 50024 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | |
| Koha item type | Books |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Materials specified (bound volume or other part) | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Full call number | Barcode | Checked out | Date last seen | Date last checked out | Copy number | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Stack Area - Ground Floor | Central Library, IITB | Central Library, IITB | General Stacks | 06/06/2023 | 1 | 681.3(VHDL) Man | 249752 | 10/12/2023 | 10/11/2023 | 10/11/2023 | 1 | 06/06/2023 | Books |