Partitioning for fault simulation acceleration on an FPGA based hardware emulator (R)
Karthik, N.
Partitioning for fault simulation acceleration on an FPGA based hardware emulator (R) - - Mumbai IIT 2006 - iv,30 p. 29 cm - .
Desai, Madhav P.
Theses and Dissertations
Field programmable gate arrays , Integrated circuits-Computer simulation , Fault location(Engineering)
043:621.372:621.382Kar
Partitioning for fault simulation acceleration on an FPGA based hardware emulator (R) - - Mumbai IIT 2006 - iv,30 p. 29 cm - .
Desai, Madhav P.
Theses and Dissertations
Field programmable gate arrays , Integrated circuits-Computer simulation , Fault location(Engineering)
043:621.372:621.382Kar